It is known to employ so-called punch-through diodes for temperature-controlled voltage reference or voltage limitation. Punch-through diodes are p.sup.+ np.sup.+ or n+pn+semiconductor structures in which the width and doping of the central zone is selected such that no avalanche or Zener effect appears when voltage is applied to the two outer layers. If the voltage is increased, the space-charge region of the blocking pn-junction expands until it touches the pn-junction on the opposite side. This pn-junction operated in the on-state injects charge carriers into the field of the space-charge region, so that the current sharply increases starting at this voltage. At least with certain current densities, the current-voltage characteristic curve is practically independent of the temperature.
However, in connection with such punch-through diodes it is disadvantageous that the limiting voltage increases with the square of the width of the central highly resistive layer. Because of fluctuations in the penetration depth of the p-diffusion occurring during the manufacturing process it is difficult to specifically produce punch-through diodes with exactly defined breakdown values and to integrate them in particular for voltage limitation into planar transistors.